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  1. Cyclone V SoC Dev Kit, CAN connector pin assignment
  2. Cyclone V SX SoC Development Board - PCIe Reference Design
  3. Problems with Yocto/Poky Linux on the Arrow SoC kit
  4. How to load ELF on the board? / U-boot with Ethernet support for SocKit ?
  5. *** Read Me !!! ***
  6. Golden Top Level Pin Mapping Error
  7. Cyclone V dev. and USB Blaster II
  8. SoCKit, U-Boot problem
  9. Accessing EEPROM on I2C Bus 0 - Altera Arrow SoC kit
  10. What is the right SOPC compenent for dcfifo?
  11. General Purpose I/O in Cyclone 5 SoC
  12. DE2 component
  13. SockIt System Console in Q-II v13.1
  14. SoCKit Development Kit tools?
  15. error message while booting GSRD on CycloneV SoCKit
  16. Arrow SoCkit : generate SD card
  17. Is SoC EDS web version only good for linux?
  18. sopc builder image needed
  19. SocKit for Ethernet project
  20. Pin Assignment for SSRAM on Stratixiv gx 230
  21. Compile on the DE1-SoC instead of cross compile - Equivalent of yum install / apt-get
  22. Use two Kinds PCIe REFCLK in SOC Development Kit
  23. DE1-SoC FPGA Configuration from HPS Failure
  24. vhdl sample code for SoCkit
  25. hardware library
  26. Cannot run de1-soc_vip_demo on DE1-SoC board
  27. Help with Video In through Clocked Video Input on DE1-SoC board
  28. Arrow/Terasic SoCkit and Fedora armhfp?
  29. ubuntu boot fail on DE1-SOC
  30. Altera Cyclone V Development Kit Jumper Postion
  31. PCIe Hard IP returning stale data for Cyclone IV
  32. Cyclone IV Transciever Starter Kit
  33. Altera Cyclone V development board FPGA problem (error code:-4)
  34. Using HPS_KEY and HPS_LED in FPGA via LOAN IO in DE1-SoC
  35. DE1-SoC not powering up
  36. Ideas for my thesis using DE1-SoC development board and DSP Builder tool.
  37. Communicate sim900 with DE2
  38. Yocto BSP for SoCkit?
  39. SoCKit rev D. HCSL refclk; how to use?
  40. Helio Vs Altera Soc Vs Arrow kit for Cyclone V evaluation
  41. Issue with PCIe of Altera SoC SX kit
  42. DHCP at power up doesn't request IP
  43. Using PCIe on Cyclone V SX SoC Development Kit
  44. Cyclone IV Transciever Starter Kit Automation Issue MAX_error LED stuck on.
  45. DE0-Nano Default SOF
  46. PCISIG Compliance of Stratix V GX FPGA Development Board ??
  47. questions about Cyclone V SOC dev kit HPS DDR3 DQ pins
  48. What's the linux boot sequence?
  49. Loan IO in Qsys/Quartus 2
  50. Altera Cyclone V SoC dev kit-- LED not working
  51. Stratix V GX FPGA Kit slot mount bracket
  52. Failure proramming my DE1-SOC
  53. Ethernet Port
  54. TTK .. having difficulties
  55. altera_pcie_gui.exe
  56. DE1-SOC Power Consumption
  57. Cyclone 5 SoC HPS GIC
  58. terasic DE0-Nano Developmentkiy- linux help
  59. Driver software for USB OTG device mode interface on DE0-nano-SoC?
  60. Ubuntu on terasic DE-1 SOC help needed
  61. debian or ubuntu 14+ for DE1-SOC board?
  62. can't able to use usleep function in ARM DS-5
  63. Problems Rebuilding Golden Reference Design on Cyclone V SoC Development Kit
  64. SocEDS SSH connect failure
  65. JP0 and JP1 connection DEO nano board (Cyclone IV)
  66. Cyclone V Development kit with MATLAB HDL Coder
  67. Connect Cyclone V SX SoC Development Board to PC using PICe
  68. Using SPI on the ltc header Arrow Cyclone V SoCKit
  69. Linux and Programming the FPGA
  70. SoC SDK for audio and voice application
  71. SoCKit Hard DDR3 controller
  72. Configuring serial connection for windows (10) - Page Fault in non-paged area
  73. Helio board USB and UART serial interface
  74. Ds-5 debug on Arria 10 Reflex Alaric board.
  75. MAX LOAD and CONF leds are blinking when power on - Cyclone V SoC Development Kit
  76. Arria V SoC Transceivers
  77. MAX_CONF_DONE LED blink after Power Cycle
  78. Altera MAX10 Development Board - vmlinux pof to address 0x00000000
  79. Ethernet connection between DE0_NANO_SOC board and PC
  80. Board Extension for DE1-SoC
  81. Unable to program EPSQ1024 on Altera Arria 10 Soc Dev Kit using Quartus Programmer
  82. De0 Nano SoC Connect to Bluetooth Dongle
  83. MicroSD daughter card - Arria 10 dev board
  84. Build de0-nano-soc with web license?
  85. Frame Reader accessing HPS SDRAM
  86. Trying to use C to open a shared file in my win7 PC
  87. Using the HPS to FPGA 32 bit registers
  88. Soc Cyclone V SX development kit Error -1
  89. my first HPS FPGA experience
  90. Switching a MOSFET with the SoC kit.
  91. Problem with PCIe Root Port on the Altera Cyclone V
  92. cyclone V sockit parallel lvds termination
  93. ltspice for gpio pin
  94. My_First_HPS Error
  95. DE0-nano-SoC - Is it possible to reconfigure it at run-time?
  96. Arria 10 SX Dev Brd. How to program LMK04828? UG says "TI GUI" but no additional info
  97. I'm having difficulty with ssh to new Arria 10 SoC Dev Kits